The present invention relates to low phase noise frequency synthesizers, and more particularly to a phase lock for a synthesizer phase reference oscillator for providing an accurate frequency and preventing drift.
When designing low phase noise frequency synthesizers, many oscillators that exhibit low phase noise also drift rapidly or have an initial frequency that is only approximately correct and varies from unit to unit. Further these oscillators often lose their low phase noise characteristics if they are redesigned to electronically tune over a substantial frequency range in order to bring them to a standard frequency value. It should be noted that it is nearly always possible to tune these oscillators over a small frequency range near their initial frequency by some means, be it a heavily de-coupled varactor or by varying the oscillator supply voltage.
A user expects that when two or more such frequency synthesizers share the same frequency reference, their outputs will exhibit phase coherence. An example of phase coherence is that, if set to the same frequency, the phase angle between the two frequency synthesizer outputs remains constant.
Direct digital synthesis (DDS) is illustrated in FIG. 1 where a value D is added to the value in a latch until it exceeds the latch capacity, at which point the value in the latch rolls over. The value in the latch is then the summation of D over time modulo the maximum numeric value of the latch, 2A. The latch holds a value proportional to the phase of a sine wave signal being synthesized. Its value is sent to a ROM that converts the phase values into values correct for a sine wave, and then a D/A converter is used to create an analog sine wave out of the numeric representation of one. The DDS output frequency is given byFout=Fin(D/2A)where A is the width of the accumulator bus. DDS is well documented—see “A Technical Tutorial on Digital Signal Synthesis” by Analog Devices, available at    <http://www.analog.com/technology/dataConverter/dds/tecnical_articles.html>
An example of a DDS system used to transform a phase reference oscillator's frequency to an output frequency signal is shown in FIG. 2. Here, for example, a 300 MHz phase reference oscillator may be designed around a very high quality quartz crystal that exhibits very low phase noise or some other high-Q device. DDS is used to generate an offset frequency signal (3-18 MHz in this example) of very high setability, such as in microHertz steps with an Analog Devices AD9852. The offset signal is used together with the frequency signal from an intermediate frequency oscillator to create another frequency signal (303-318 MHz in this example) that is the sum of the 300 MHz phase reference frequency and the DDS offset frequency signal. The intermediate frequency signal is used to phase lock an RF oscillator to its Nth harmonic (4.0-8.0 GHz in this example) via a sampling phase detector. The phase reference frequency may be anywhere from a few Hertz to a few kiloHertz away from exactly 300 MHz, in this example. It will exhibit some frequency change with its supply voltage, called “pulling”, or it may have a varactor imbedded in its circuit to allow tuning it over a very narrow frequency range without affecting its phase noise characteristics.
What is desired is a frequency synthesizer circuit arrangement that allows a designer to use the frequency characteristics of low phase noise oscillators while achieving a phase coherent output.